Online Course Highlights

Princeton University via Coursera
Learn for FREE, Up-gradable
50 hours of effort required
136,948+ already enrolled!
4.7 ★★★★★ (700 Ratings)
Skill Level: Mixed
Language: English

In this course, you will learn to design the computer architecture of complex modern microprocessors.

All the features of this course are available for free. It does not offer a certificate upon completion.

Syllabus:

WEEK 1

Introduction, Instruction Set Architecture, and Microcode

4 hours to complete

This lecture will give you a broad overview of the course, as well as the description of architecture, micro-architecture and instruction set architectures.

Pipelining Review

3 hours to complete

This lecture covers the basic concept of pipeline and two different types of hazards.

WEEK 2

Cache Review

3 hours to complete

This lecture covers control hazards and the motivation for caches.

Superscalar 1

3 hours to complete

This lecture covers cache characteristics and basic superscalar architecture.

To deepen your understanding of how to effectively manage and structure information, explore our Information Architecture Education resources.

WEEK 3

Superscalar 2 & Exceptions

2 hours to complete

This lecture covers the common issues for superscalar architecture.

Superscalar 3

2 hours to complete

This lecture covers different kinds of architectures for out-of-order processors.

WEEK 4

Superscalar 4

1 hour to complete

This lecture covers the common methods used to improve the performance of out-of-order processors including register renaming and memory disambiguation.

VLIW 1

2 hours to complete

This lecture covers the basic concept of very long instruction word (VLIW) processors.

WEEK 5

VLIW2

3 hours to complete

This lecture covers the common methods used to improve VLIW performance.

Branch Prediction

2 hours to complete

This lecture covers the motivation and implementation of branch predictors.

WEEK 6

Advanced Caches 1

3 hours to complete

This lecture covers the advanced mechanisms used to improve cache performance.

Advanced Caches 2

2 hours to complete

This lecture covers more advanced mechanisms used to improve cache performance.

WEEK 7

Memory Protection

3 hours to complete

This lecture covers memory management and protection.

Vector Processors and GPUs

3 hours to complete

This lecture covers the vector processor and optimizations for vector processors.

WEEK 8

Multithreading

2 hours to complete

This lecture covers different types of multithreading.

Parallel Programming 1

1 hour to complete

This lecture covers the concepts of parallelism, consistency models, and basic parallel programming techniques.

WEEK 9

Parallel Programming 2

1 hour to complete

This lecture covers the solutions for the consistency problem in parallel programming.

Small Multiprocessors

2 hours to complete

This lecture covers the implementation of small multiprocessors.

WEEK 10

Multiprocessor Interconnect 1

3 hours to complete

This lecture covers the design of interconnects for a multiprocessor.

Multiprocessor Interconnect 2

3 hours to complete

This lecture covers the design of interconnects for multiprocessor and network topology.

WEEK 11: Large Multiprocessors (Directory Protocols)

3 hours to complete

This lecture covers the motivation and implementation of directory protocol used for coherence on large multiprocessors.

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Computer Architecture